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? semiconductor components industries, llc, 2005 september, 2005 ? rev. 7 1 publication order number: mc74ac573/d mc74ac573, mc74act573 octal buffer/line driver with 3?state outputs the mc74ac573/74act573 is a high?speed octal latch with buffered common latch enable (le) and buffered common output enable (oe ) inputs. the mc74ac573/74act573 is func tionally identical to the mc74ac373/74act373 but has inputs and outputs on opposite sides. features ? inputs and outputs on opposite sides of package allowing easy interface with microprocessors ? useful as input or output port for microprocessors ? functionally identical to mc74ac373/74act373 ? 3?state outputs for bus interfacing ? outputs source/sink 24 ma ? act573 has ttl compatible inputs ? pb?free packages are available* figure 1. pinout 20?lead packages conductors (top view) 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 le oe d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 gnd pin assignment pin function d 0 ?d 7 data inputs le latch enable input oe 3?state output enable input o 0 ?o 7 3?state latch outputs figure 2. logic symbol d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 le o 1 o 2 o 3 o 4 o 5 o 6 o 7 oe o 0 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 1 20 pdip?20 n suffix case 738 1 20 1 20 1 20 so?20 dw suffix case 751d tssop?20 dt suffix case 948e eiaj?20 m suffix case 967 http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information mc74xxx573n awlyywwg xxx573 awlyywwg xxx 573 alyw 74xxx573 awlywwg xxx = ac or act a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb?free package (note: microdot may be in either location) marking diagram
mc74ac573, mc74act573 http://onsemi.com 2 truth table inputs outputs oe le d n o n l h h h l h l l l l x o 0 h x x z h = high voltage level l = low voltage level z = high impedance x = immaterial o 0 = previous o 0 before low?to?high transition of clock functional description the mc74ac573/74act574 contains eight d?type latches with 3?state output buffers. when the latch enable (le) input is high, data on the d n inputs enters the latches. in this condition the latches are transparent, i.e., a latch output will change state each time its d input changes. when le is low the latches store the information that was present on the d inputs a setup time preceding the high?to?low transition of le. the 3?state buffers are controlled by the output enable (oe ) input. when oe is low, the buf fers are enabled. when oe is high the buffers are in the high impedance mode but this does not interfere with entering new data into the latches. figure 3. logic diagram d le q d le q d le q d le q d le q d le q d le q d le q d 1 d 2 d 3 d 4 d 5 d 6 d 7 le oe o 0 o 1 o 2 o 3 o 4 o 5 o 6 o 7 d 0 note: that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
mc74ac573, mc74act573 http://onsemi.com 3 maximum ratings symbol parameter value unit v cc dc supply voltage (referenced to gnd) ?0.5 to +7.0 v v in dc input voltage (referenced to gnd) ?0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) ?0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage temperature ?65 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. recommended operating conditions symbol parameter min typ max unit v cc supply voltage ac 2.0 5.0 6.0 v act 4.5 5.0 5.5 v in , v out dc input voltage, output voltage (ref. to gnd) 0 ? v cc v t r , t f input rise and fall time (note 1) ac devices except schmitt inputs v cc @ 3.0 v ? 150 ? v cc @ 4.5 v ? 40 ? ns/v v cc @ 5.5 v ? 25 ? t r , t f input rise and fall time (note 2) act devices except schmitt inputs v cc @ 4.5 v ? 10 ? ns/v v cc @ 5.5 v ? 8.0 ? t j junction temperature (pdip) ? ? 140 c t a operating ambient temperature range ?40 25 85 c i oh output current ? high ? ? ?24 ma i ol output current ? low ? ? 24 ma 1. v in from 30% to 70% v cc ; see individual data sheets for devices that differ from the typical input rise and fall times. 2. v in from 0.8 v to 2.0 v; see individual data sheets for devices that differ from the typical input rise and fall times.
mc74ac573, mc74act573 http://onsemi.com 4 dc characteristics symbol parameter v cc (v) 74ac 74ac unit conditions t a = +25 c t a = ?40 c to +85 c typ guaranteed limits v ih minimum high level input voltage 3.0 1.5 2.1 2.1 v out = 0.1 v 4.5 2.25 3.15 3.15 v or v cc ? 0.1 v 5.5 2.75 3.85 3.85 v il maximum low level input voltage 3.0 1.5 0.9 0.9 v out = 0.1 v 4.5 2.25 1.35 1.35 v or v cc ? 0.1 v 5.5 2.75 1.65 1.65 v oh minimum high level output voltage 3.0 2.99 2.9 2.9 i out = ?50 a 4.5 4.49 4.4 4.4 v 5.5 5.49 5.4 5.4 v *v in = v il or v ih 3.0 ? 2.56 2.46 ?12 ma 4.5 ? 3.86 3.76 i oh ?24 ma 5.5 ? 4.86 4.76 ?24 ma v ol maximum low level output voltage 3.0 0.002 0.1 0.1 i out = 50 a 4.5 0.001 0.1 0.1 v 5.5 0.001 0.1 0.1 v *v in = v il or v ih 3.0 ? 0.36 0.44 12 ma 4.5 ? 0.36 0.44 i ol 24 ma 5.5 ? 0.36 0.44 24 ma i in maximum input leakage current 5.5 ? 0.1 1.0 a v i = v cc , gnd i oz maximum 3?state current v i (oe) = v il , v ih 5.5 ? 0.5 5.0 a v i = v cc , gnd v o = v cc , gnd i old ?minimum dynamic output current 5.5 ? ? 75 ma v old = 1.65 v max i ohd 5.5 ? ? ?75 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 ? 8.0 80 a v in = v cc or gnd note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc . *all outputs loaded; thresholds on input associated with output under test. ?maximum test duration 2.0 ms, one output loaded at a time.
mc74ac573, mc74act573 http://onsemi.com 5 ac characteristics (for figures and waveforms ? see section 3) symbol parameter v cc * (v) 74ac 74ac unit fig. no. t a = +25 c c l = 50 pf t a = ?40 c to +85 c c l = 50 pf min typ max min max t plh propagation delay 3.3 2.5 ? 13.0 2.0 15.0 ns 3?5 d n to o n 5.0 2.5 ? 10.0 2.0 11.5 t phl propagation delay 3.3 2.5 ? 12.0 2.0 14.0 ns 3?5 d n to o n 5.0 2.5 ? 9.5 2.0 11.0 t plh propagation delay 3.3 2.5 ? 13.0 2.0 15.0 ns 3?6 le to o n 5.0 2.5 ? 9.5 2.0 11.0 t phl propagation delay 3.3 2.5 ? 12.0 2.0 14.0 ns 3?6 le to o n 5.0 2.5 ? 8.5 2.0 10.0 t pzh output enable time 3.3 2.5 ? 11.0 2.0 12.0 ns 3?7 5.0 2.5 ? 9.0 2.0 10.0 t pzl output enable time 3.3 2.5 ? 11.0 2.0 12.5 ns 3?8 5.0 2.5 ? 8.5 2.0 9.5 t phz output disable time 3.3 2.5 ? 12.5 2.0 13.5 ns 3?7 5.0 2.5 ? 11.0 2.0 12.0 t plz output disable time 3.3 2.5 ? 9.5 2.0 10.5 ns 3?8 5.0 2.5 ? 8.0 2.0 9.0 *voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v. ac operating requirements symbol parameter v cc * (v) 74ac 74ac unit fig. no. t a = +25 c c l = 50 pf t a = ?40 c to +85 c c l = 50 pf typ guaranteed minimum t s setup time, high or low 3.3 ? 3.5 4.0 ns 3?9 d n to le 5.0 ? 3.0 3.5 t h hold time, high or low 3.3 ? 2.0 2.0 ns 3?9 d n to le 5.0 ? 2.0 2.0 t w le pulse width, high 3.3 ? 6.0 7.0 ns 3?6 5.0 ? 4.0 5.0 *voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac573, mc74act573 http://onsemi.com 6 dc characteristics symbol parameter v cc (v) 74act 74act unit conditions t a = +25 c t a = ?40 c to +85 c typ guaranteed limits v ih minimum high level input voltage 4.5 1.5 2.0 2.0 v v out = 0.1 v 5.5 1.5 2.0 2.0 or v cc ? 0.1 v v il maximum low level input voltage 4.5 1.5 0.8 0.8 v v out = 0.1 v 5.5 1.5 0.8 0.8 or v cc ? 0.1 v v oh minimum high level output voltage 4.5 4.49 4.4 4.4 v i out = ?50 a 5.5 5.49 5.4 5.4 *v in = v il or v ih 4.5 ? 3.86 3.76 v i oh ?24 ma 5.5 ? 4.86 4.76 ?24 ma v ol maximum low level output voltage 4.5 0.001 0.1 0.1 v i out = 50 a 5.5 0.001 0.1 0.1 *v in = v il or v ih 4.5 ? 0.36 0.44 v i ol 24 ma 5.5 ? 0.36 0.44 24 ma i in maximum input leakage current 5.5 ? 0.1 1.0 a v i = v cc , gnd i cct additional max. i cc /input 5.5 0.6 ? 1.5 ma v i = v cc ? 2.1 v i oz maximum 3-state current v i (oe) = v il , v ih 5.5 ? 0.5 5.0 a v i = v cc , gnd v o = v cc , gnd i old ?minimum dynamic output current 5.5 ? ? 75 ma v old = 1.65 v max i ohd 5.5 ? ? ?75 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 ? 8.0 80 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. ?maximum test duration 2.0 ms, one output loaded at a time. ac characteristics (for figures and waveforms ? see section 3) symbol parameter v cc * (v) 74act 74act unit fig. no. t a = +25 c c l = 50 pf t a = ?40 c to +85 c c l = 50 pf min typ max min max t plh propagation delay d n to o n 5.0 2.5 ? 10.5 2.0 12 ns 3?5 t phl propagation delay d n to o n 5.0 2.5 ? 10.5 2.0 12 ns 3?5 t plh propagation delay le to o n 5.0 3.0 ? 10.5 2.5 12 ns 3?6 t phl propagation delay le to o n 5.0 2.5 ? 9.5 2.0 10.5 ns 3?6 t pzh output enable time 5.0 2.0 ? 10 1.5 11 ns 3?7 t pzl output enable time 5.0 1.5 ? 9.5 1.5 10.5 ns 3?8 t phz output disable time 5.0 2.5 ? 11 1.5 12.5 ns 3?7 t plz output disable time 5.0 1.5 ? 8.5 1.0 9.5 ns 3?8 *voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac573, mc74act573 http://onsemi.com 7 ac operating requirements symbol parameter v cc * (v) 74act 74act unit fig. no. t a = +25 c c l = 50 pf t a = ?40 c to +85 c c l = 50 pf typ guaranteed minimum t s setup time, high or low d n to le 5.0 ? 3.0 3.5 ns 3?9 t h hold time, high or low d n to le 5.0 ? 0 0 ns 3?9 t w le pulse width, high 5.0 ? 3.5 4.0 ns 3?6 *voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ unit test conditions c in input capacitance 5.0 pf v cc = 5.0 v c pd power dissipation capacitance 25 pf v cc = 5.0 v
mc74ac573, mc74act573 http://onsemi.com 8 ordering information device package shipping ? mc74ac573n pdip?20 18 units / rail mc74ac573ng pdip?20 (pb?free) 18 units / rail mc74ac573dw soic?20 38 units / rail mc74ac573dwg soic?20 (pb?free) 38 units / rail mc74ac573dwr2 soic?20 1000 units / tape & reel mc74ac573dwr2g soic?20 (pb?free) 1000 units / tape & reel mc74ac573dtr2 tssop?20* 2500 units / tape & reel mc74ac573dtr2g tssop?20* 2500 units / tape & reel mc74ac573mel soeiaj?20 2000 units / tape & reel mc74ac573melg soeiaj?20 (pb?free) 2000 units / tape & reel mc74act573n pdip?20 18 units / rail MC74ACT573NG pdip?20 (pb?free) 18 units / rail mc74act573dw soic?20 38 units / rail mc74act573dwg soic?20 (pb?free) 38 units / rail mc74act573dwr2 soic?20 1000 units / tape & reel mc74act573dwr2g soic?20 (pb?free) 1000 units / tape & reel mc74act573dtr2 tssop?20* 2500 units / tape & reel mc74act573dtr2g tssop?20* 2500 units / tape & reel ?for information on tape and reel specifications,including part orientation and tape sizes, please refer to our tape and reel p ackaging specifications brochure, brd8011/d. *this package is inherently pb?free.
mc74ac573, mc74act573 http://onsemi.com 9 package dimensions pdip?20 n suffix 20 pin plastic dip package case 738?03 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 ?a? seating plane k n f g d 20 pl ?t? m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc so?20 dw suffix 20 pin plastic soic package case 751d?05 issue g 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
mc74ac573, mc74act573 http://onsemi.com 10 package dimensions tssop?20 dt suffix 20 pin plastic tssop package case 948e?02 issue b dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. 110 11 20 pin 1 ident a b ?t? 0.100 (0.004) c d g h section n?n k k1 jj1 n n m f ?w? seating plane ?v? ?u? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 ??? ??? s u 0.15 (0.006) t
mc74ac573, mc74act573 http://onsemi.com 11 package dimensions soeiaj?20 m suffix 20 pin plastic eiaj package case 967?01 issue o dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 0.81 ??? 0.032 a 1 h e q 1 l e 10 0 10 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1 c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z
mc74ac573, mc74act573 http://onsemi.com 12 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mc74ac573/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.

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